Mobile Pixel Link Level Zero (“MPL Level-0”) is a specification that defines the electrical connections, clocking, and bit order for serial video interfaces. Among other things, the MPL Level-0 specification defines a master-slave, point-to-point, bidirectional serial interface between a processor and a display. The MPL Level-0 specification may be implemented in mobile handheld devices or other devices. The MPL Level-0 specification provides several advantages, including a reduced number of wires in the interface, reduced power consumption, and reduced electro-magnetic interference.
The MPL Level-0 serial interface defines physical lines for carrying a clock signal (denoted “MC”) and one or more data signals (denoted “MD”). The MC clock signal is sent from the master to the slave. Write data is sent from the master to the slave, and the slave uses both rising and falling edges of the MC clock signal to recover the write data. Read data is sent from the slave to the master, where the slave uses the rising edges of the MC clock signal to transmit the read data.
Read data sent from the slave is recovered at the master by sampling any signals on the MD data lines. However, the arrival time of the read data sent from the slave to the master is variable. Also, the period of the MC clock signal can have a wide range of values. This may make it difficult to sample the read data at the master using a single static MC clock signal. One prior approach to solving this problem is to over-sample the read data at the master. For example, the master could sample the read data using an internal clock that has twice the frequency of the MC clock signal. This allows for over-sampling of the MD data signals and recovery of the read data.